Transistor circuit with slow voltage rise and fast voltage fall characteristic

ABSTRACT

A transistor circuit comprises a series circuit consisting of a diode and a capacitor, which is connected in parallel to a DC electric power source, and a first transistor has its base electrode connected to the junction of the diode and capacitor of the series circuit, its emitter electrode connected to one terminal of the DC power source through a resistor, and its collector electrode connected to the other terminal of the DC power source. A second transistor, has its base electrode connected to the junction of the emitter electrode of the first transistor and the resistor, its collector electrode connected to one terminal of the DC power source, and its emitter electrode connected to an output terminal.

United States Patent 1191 1111 3,832,627 Ohsawa Aug. 27, 1974 1 TRANSISTOR CIRCUIT WITH SLOW 3,099,790 7/1963 Marshall, Jr. 323/22 T VOLTAGE RISE AND FAST VOLTAGE 3,189,751 6/1965 Winchel 307/293 FALL CHARACTERISTIC 3,440,451 4/1969 Honig 307/293 Inventor: Mitsuo Ohsawa, Fujisawa, Japan Assignee: Sony Corporation, Tokyo, Japan Filed: Sept. 22, 1972 Appl. No.: 291,352

Foreign Application Priority Data Sept. 25, 1971 Japan 46-74840 Sept. 25, 1971 Japan 46-74841 References Cited UNITED STATES PATENTS 8/1961 Grenier 323/22 T 3/1962 Wilbur et a1. 323/22 T Primary ExaminerGerald Goldberg Attorney, Agent, or FirmHi11, Gross, Simpson, Van Santen, Steadman, Chiara & Simpson [57] ABSTRACT A transistor circuit comprises a series circuit consisting of a diode and a capacitor, which is connected in parallel to a DC electric power source, and a first transistor has its base electrode connected to the junc tion of the diode and capacitor of the series circuit, its emitter electrode connected to one terminal of the DC power source through a resistor, and its collector electrode connected to the other terminal of the DC power source. A second transistor, has its base electrode connected to the junction of the emitter electrode of the first transistor and the resistor, its collector electrode connected to one terminal of the DC power source, and its emitter electrode connected to an output terminal.

13 Clains, 12 Drawing Figures PATENIEUmszmu snmmr' 4 T 0 Al 0 5%; 5% 5% TIME PAIENIEH AUG 2 7 I974 snmw 4 TRANSISTOR CIRCUIT WITII SLOW VOLTAGE RISE AND FAST VOLTAGE FALL CHARACTERISTIC BACKGROUND OF THEINVENTION l. Field of the Invention The present invention relates to a transistor circuit and more particularly to such a circuit adapted to produce at an output terminal, a voltage which has a relatively slow rise time, and a relatively fast fall time, relative to a voltage applied to an input terminal of the circuit.

2. Description of the Prior Art A conventional electronic apparatus such as a radio receiver, a magnetic tape recording and reproducing apparatus or the like in general rectifies an output from a commercial electric power source and then applies the rectified output after filtering, to a load such as, for example, an amplifier, an oscillator and so on. In such an electronic apparatus there is customarily provided a voltage regulating circuit between the rectifier and the load, for applying to the latter a relatively constant voltage, even when the AC power source changes its voltage level. A voltage regulating circuit normally consists of a transistor connected to one of the output terminals of the rectifier, in series therwith, a Zener diode operative as an error detector and a DC amplifier. The voltage regulating circuit also includes a resistor and a capacitor for smoothing the outputvoltage. In the prior art, the rise time of the output of the voltage'regulating circuit is short and the output voltage is maintained at a relatively high level when the power switch is turned off, so that a click noise is produced when the power switch is turned on or off, unless a separate muting circuit is provided. Accordingly, it is desirable to provide a voltage regulating circuit in which such click noises are avoided when the power switch is turned on and off, by allowing for a slowly rising voltage when the switch is turned on, and a rapidly falling voltage when the switch is turned off. I

SUMMARY OF THE INVENTION It is a principal object of the present invention to provide a transistor circuit for producing an output voltage having a relatively slow rise time, compared with an input voltage.

Another object of the present invention is to provide a transistor circuit for producing an output voltage with a relatively fast fall time, compared with an input voltage.

A further object of the present invention is to provide a transistor circuit which effectively prevents a click noise from being produced when an electric power switch is turned on or off.

Another object of the present invention is to provide a transistor circuit for producing an output voltage with a relatively slow rise time, compared with an input voltage, and which operates as a constant voltage circuit after it has reached its stable state.

A further object of the present invention is to provide a transistor voltage regulator circuit for producing an output which is free from residual voltage.

Another object of the present invention is to provide a transistor circuit suitable for use as a protective circuit for an amplifier.

A further object of the present invention is to provide a transistor circuit which prevents a click noise from being amplified when an electric power source switch is turned on or off and operates to protect an amplifier from abnormal signals.

These and other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings.

In accordance with one embodiment of the present invention, there is provided, in a transistor circuit having a pair of input terminals adapted to be connected to a DC voltage source and a pair of output terminals adapted to be connected to a utilization device such as an amplifier or the like, a first transistor having emitter, base and collector electrodes, connecting means connecting the emitter and collector electrodes between one of the input terminals and one of the output terminals, the other input terminal and the other output terminal being connected directly together, timing circuit means comprising a circuit including a resistor, a capacitor and a rectifying means connected across the input terminals, and circuit means connecting the timing circuit means with the base electrode of the transistor, the timing circuit means establishing a first current path through the capacitor and the resistor when a DC voltage is first applied to the input terminals, and a second current path through the capacitor and the rectifying means when the DC voltage is disconnected from the input terminals.

- BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic circuit diagram showing an example of a transistor circuit constructed according to the invention;

FIGS. 2 and 3 are waveform diagrams of output volt I ages produced by the circuit shown in FIG. 1;

FIGS. 4 A and B are waveform diagrams used to illustrate a utilization of the invention;

FIGS. 5 8, inclusive, are schematic circuit diagrams of other examples of transistor circuits constructed according to the invention;

FIGS. 9A and 9B are waveform diagrams used for illustrating the operation of the example shown in FIG. 8; and

FIG. 10 is a circuit diagram of an audio electric power amplifier in which the transistor circuit of the invention is employed for protecting the electric power amplifier and avoid a click noise which is produced when the electric power source is connected to the circuit or not.

DESCRIPTION OF THE PREFERRED EMBODIMENTS With reference to FIG. 1 a schematic circuit diagram of a transistor circuit constructed according to the invention will now be described. As shown in FIG. 1 a transformer T has a primary winding la and a secondary winding lb. The primary winding 1a is connected to an AC electric power source 2, while a rectifying cir-- type of a DC electric power source can be used for the transistor circuit of the invention instead of that described just above, the particular form of the DC electric power source having no direct relationship with the invention.

With the transistor circuit 7 of the invention, a series circuit consisting of a diode 8 and a capacitor 9 is connected in parallel to the output terminals 6a and 6b of the DC electric power source and a PNP type transistor 11 is connected at its base electrode to the connection point P between the diode 8 and the capacitor 9 of the series circuit 10. The transistor 11 has its collector electrode connected to one of the electrodes of the DC electric power source or to the output terminal 6b and its emitter electrode is connected through a resistor 12 to the other electrode of the DC power source or to the output terminal 6a. The connection point Q between the emitter electrode of the transistor 11 and the resistor 12 is connected to the base electrode of a NPN type transistor 14 through its base load or a resistor 13. The connection point R between the resistor 13 and the base electrode of the transistor 14 is connected through a capacitor 15 to ground, while the emitter electrode of transistor 14 is let to an output terminal 16 of the circuit 7. A load 18 is connected between the terminals 6a and 6b.

In the example shown in FIG. 1, the transistor 14,

from which the output terminal 16 is led out, also serves as a transistor of ripple filter circuit 17.

A description will be now given on the operation of the. transistor circuit 7 mentioned above. The output terminals 6a and 6b are supplied with a DC voltage which is smoothed. However, when an electric power source switch (not shown), which is connected in series with the AC electric power source 2, is in its off state, no DC voltage is impressed on the capacitor 9 of the series circuit 10, with the result that no electric charge is stored in the capacitor 9. Accordingly, the collector potential of the transistor 11 is held equal to the base potential thereof so that the transistor 11 is in such a condition that it becomes conductive immediately when voltage is applied thereto.

Therefore, when the power source switch is turned on, current may flow through the resistor 12 and the transistor 11, which is conductive, as shown by an arrow a to start charging the capacitor 9. As a result, the potential at the connection point P between the diode 8 and the capacitor 9 of the series circuit 10 increases, correspondingly. In this case, however, if the resistance value of the resistor 12 connectedto the emitter electrode of the transistor 11 is relatively large the voltage drop across the resistor 12 is large with the result that current flowing through the collector electrode of the transistor 11 is suppressed. For this reason, the base current of the transistor 11 does not flow abruptly and operates in negative direction with respect to the voltage build-up across the emittercollector terminals of the transistor 11. Therefore, the base current of the transistor 11 is kept substantially constant to increase the potential Vp at the connection point P gradually and to charge up the capacitor 9.

Although the potential V P of the connection point P increases gradually as mentioned above, the build-up of the potential V depends upon the time constant TC determined by the input resistance of the transistor 11 and the capacitor 9. Since the potential V at the connection point 0 between the collector electrode of the transistor 11 and the resistor 12 is higher than the potential V at the connection point P, by the potential V between the base-emitter of the transistor 11, the potential V changes approximately in accordance with the potential V and finally depends upon the time constant TC.

Similarly, the potential V at the connection point R between the resistor 13 and the base electrode of the transistor 14 increases due to the fact that the electric charge stored in the capacitor 15 increases in accordance with the increase of the potential V at the connection point O, which is impressed on the capacitor 15 through the resistor 13. The charging rate of the capacitor l5 depends upon the time constant TC which is determined by the resistors 12 and 13 and the capacitor 15. In this case, however, since the potential V at the connection point Q depends upon the time constant TC, the build-up rate of the potential V at the connection point R is determined with both the time constants TC and TC.

When the capacitor 9 has been charged up completely, the base current of the transistor 11 is stopped or the transistor 11 becomes in cut-off or nonconductive state with the result that the potential V and the potential V at the emitter electrode of the transistor 14 or the output terminal 16 are kept constant with the product of the base current of the transistor 14 and the resistance values of the resistors 12 and 13.

The output voltage V appearing at the output terminal 16 of the circuit 7 is approximately in proportion to the build-up curve of the potential V at the connection point R as shown in FIG. 2. In FIG. 2 the abscissa represents time and the ordinate represents the output voltage V Reference letter t, on the abscissa shows the time point when the electric power source switch is turned on. After a predetermined time period from the time point t namely at a time point t the potential V at the connection point R becomes constant and hence the output voltage V reaches its stationary state. A curve portion 1 between the time points t and t shows the fact that the rise time of the output voltage V is very slow, which is mainly caused by the fact that the potential V at the connection point Q increases slowly as described above.

The output voltage V after the time t arrives at its steady state as shown by a curve portion 1 in FIG. 2 and hence there is derived from the output terminal 16, the output voltage V which is smaller than the DC voltage applied'to the terminals 6a and 6b by a predetermined value. When the power source switch is turned off at time t;;, after the time t the electric charge stored in the capacitor 9 is discharged at once, through the diode 8 to the load 18 connected between the terminals and 6b. As a result, the fall time of the output voltage V is very sharp or rapid as shown by a curve portion 1 (the fall characteristic of the output voltage V is very sharp).

The rise time of the output voltage V or the gradient of the curve portion 1 may be varied by changing the capacityof the capacitor 9, which forms a part of the series circuit 10 together with the diode 8.

FIG. 3 is a graph which shows the effect of varying the capacity of the capacitor 9. In FIG. 3 a curve portion m corresponds to an output voltage in the case where a relatively low capacity of the capacitor 9 is selected, while a curve portion m corresponds to an output voltage in the case where a greater capacity of the capacitor 9 is selected. As apparent from the figures, it is possible if desired; to delay the time to a time point t Accordingly, it may be understood that the rise time of the output voltage V can be adjusted by varying the value of the capacitor 9.

WIth the transistor circuit 7 described above, the rise time of its operation is made slow, while the fall time of its operation is made sharp, and further, the rise time can be adjusted by varying the capacity of the capacitor 9 of the series circuit 10.

Accordingly, it may be easily understood that if the transistor circuit 7 of the invention is combined with various circuits to afford effects peculiar to the circuits.

By way of example, when the transistor circuit of the invention is employed in conjunction with an ordinary time constant circuit, such as, for example, one in which a capacitor is charged through a resistor, the time constant of the ordinary circuit can be made much slower, as compared with its original time constant, by using the circuit of the present invention as a source of voltage for the time constant circuit. Further, if the transistor circuit of the invention is adapted in an electric power source system of an electronic device such as a radio receiver, a tape recorder or the like as shown in FIG. 1, a click noise produced when the electric power source is turned on or off can be eliminated. The reason is that, at the moment when the electric power source switch is turned on, a DC voltage applied to the various amplifiers is slow in rising to its steady state value, as shown in FIG. 2, so that no voltage which will start the operation of the respective amplifiers is applied to the amplifiers at the time the switch is turned on, with the result that the click noise produced when the power source switch is turned on is not amplified in the amplifier and consequently is not reproduced through a speaker. Similarly, when the power source switch is turned off, the DC voltage falls rapidly to zero by virtue of the capacitor 9 discharging through the load 18, to stop the amplifying operation of the amplifiers at once with the results that the click noise produced when the power source switch is turned off can be eliminated.

The transistor circuit of the invention may be used as a waveform converter circuit. If a DC electric power is connected to the terminals 6a and 6b, as shown in FIG. 1, and a rectangular signal N which is repeated at a predetermined or constant period as shown in FIG. 4A is applied thereto, an integrated signal N shown in FIG. 48 can be produced. That is, waveform converting is effected.

Other examples of the transistor circuit according to the invention will be hereinbelow described with reference to FIGS. 5 to 8, respectively, in which similar reference numerals and letters to those in FIG. 1 designate similar elements and their detailed description will be omitted for the sake of brevity.

In the transistor circuit 7 of the example shown in FIG. 5, a rectangular wave generator 28 and a battery E are connected in series between the terminals 6a and 6b, and a constant voltage element such as Zener diode 20 is connected to the base electrode of the transistor I sistor 12 and the capacitor 9, is multiplied by h h' (where h h are current-amplification factors of the transistors 21 and 22, respectively) and therefore the time constant can be made great. This means that the amount of capacitance needed for the capacitor 9 is only l/h; -h', the capacitance needed when the circuit of FIG. 1 is used, and hence a capacitor with very small capacity can be used as the capacitor 9. As a result, the variation in-voltage can -be decreased due to decrease of the capacity of the capacitor 9. Further, a capacitor made with a dielectric, for example, as MYLAR may be used instead of an electrolytic or chemical capacitor.

FIG. 7 'is' a residual voltage elimination circuit in which the transistor circuit 7 of the invention is accommodated. In the circuit shown in FIG. 7 a transistor 23 for residual voltage compensation is connected between the resistor 13 and the transistor 14. In this case, the transistor 14 and 23 are connected in Darlington manner.

When the power source switch is turned off the electric charge stored in the capacitor 9 is discharged through the diode 8. In practice, since the diode 8 has a threshold voltage of about 0.6 volts, the voltage at the connection point P between the diode 8 and the capacitor 9 is not made zero but held at the threshold voltage of the diode 8 to produce a residual voltage. In the example shown in FIG. 7, however, there is provided the transistor 23 so that the voltage between the base electrode of the transistor 23 and the output terminal 16 is about 1.2 volts and the voltage between the output terminal 16 and the connection point P is higher by 0.6 volts. Hence the voltage difference of just 0.6 volts is obtained, to eliminate the residual voltage. Accordingly, an output voltage without residual voltage and equal to an ordinary voltage relationship can be obtained. For this reason, when the capacitor 9 discharges its stored electric charge, even if the diode 8 has its threshold voltage, such threshold voltage does not appear at the output terminal 16 when the power source switch is turned on so that the residual voltage can be compensated for.

FIG. 8 is a so-called delay circuit in which the transistor circuit 7 of the invention is employed. In the example of FIG. 8 two Zener diodes 24 and 25 connected in series with the same polarity are connected to the base electrode of the transistor 14, and a Zener diode 26 is connected between the emitter electrode of the transistor 14 and the output terminal 16.

With the circuit shown in FIG. 8, the potential V appeared at the connection point R is shown by a curve .r in FIG. 9A, but the Zener diode 26 is not made conductive if the potential V at the connection point R is lower than the voltage V for conducting the Zener diode 26. As a result, no output voltage is produced at the output terminal 16 until the voltage appearing at the emitter electrode of the transistor 14 exceeds the.

voltage V That is, no output voltage is derived from the output terminal 16 between the time t when the power source switch is turned on and the time t when the voltage increases to the voltage V to make the Zener diode 26 conductive, while the output voltage delivered at the output terminal 16 increases gradually after the time t as shown in FIG. 98 by a curve x similar to that mentioned above. Accordingly, the delay time of the circuit is expressed by t t At and hence the circuit starts its operation with the delay circuit time At after the time when the power source switch is turned on. Further, if the capacity of the capacitor 9 of the series circuit 10 is made large, the voltage at the connection point R rises more slowly, as shown by the curve x in FIG. 9A and hence the output voltage appeared at the output terminal 16 becomes like the curve x shown in FIG. 98, with the delay time At (which is longer than At). As described above, the transistor circuit of the invention may be made as a delay circuit if it uses the Zener diode 26.

FIG. 10 is an audio apparatus such as a circuit in an audio output stage of a radio receiver in which the transistor circuit of the invention is accommodated. The example shown in FIG. 10 prevents a click noise from being produced when the power source switch is turned on or off, as well as protecting a power amplifier from unusual signals. An input signal D is applied to an input terminal 30, and then to output transistors 33 and 34, which are connected to form a single-ended push-pull circuit, through an input transistor 31 and an intermediate stage transistor 32. The base electrode of the transistor 33 is connected to the emitter electrode of a transistor 35 while the base electrode of the transistor 34 is connected to the collector electrode of a transistor 36, which is well known as a Darlington connection. In this example, a power amplifier 37 is formed of the elements from the input transistor 31 to the output transistors 33 and 34. The connection point A between the two output transistors 33 and 34 is connected through a capacitor 38 to one end of a voice coil 40 of a speaker 39 which is driven in an ordinary manner when the input signal D is applied. The other end of the voice coil 40 is grounded.

In the invention illustrated in FIG. 10 a detector circuit 41 is connected to the output transistor 34 for detecting an abnormal pulse. The emitter electrode of the transistor 34 is connected to the base electrode of a transistor 43, used in the detector circuit 41, through a capacitor 42, and a resistor 44 is inserted between the base and emitter electrodes of the transistor 43.

As described above, the example of FIG. 10 includes the transistor circuit 7 of the invention shown in FIG. 1 and described in connection therewith so that no detailed description will be given of the transistor circuit 7, but the same reference numerals and letters have been employed in FIG. 10. The connection point P between the diode 8 and the capacitor 9 of the series circuit 10 is connected to the collector electrode of the transistor 43 by means of a lead 45, and the output terminal 16 of the circuit 7 is connected to the base electrode of the input transistor 31 through a resistor 47 for base biasing, so that when the circuit is in normal operating state the input transistor 31 is supplied at its base electrode with a base bias through the transistor circuit 7 and the resistor 47. Further, the output terminal 16 is also connected to the base electrode of the transistor 35, which is connected in push-pull manner with the transistor 36, through resistors 48 and 49, and to the collector electrode of the intermediate transistor 32 and the base electrode of the transistor 36 through the resistors 48, 49 and a resistor 50. As a result, the base electrode of the transistor 35 and the collector electrode of the transistor 32 are both connected to a DC power source +B through the transistor circuit 7, and

so on.

When the detector circuit 41 detects an abnormal signal and the detected abnormal signal is applied to the transistor circuit 7, the capacitor 9 is quickly discharged through the transistor 43, and prevents the passage of the DC bias voltage to the base and collector electrodes of the transistors forming the power source amplifier to protect the single-end push-pull circuit.

As described above, the transistor circuit 7 of the invention very gradually reaches its steady stage voltage from the time when a DC voltage is applied thereto, while its output voltage falls very rapidly when the capacitor 9 is discharged, so that a desired DC voltage is derived from the output terminal 16 of the transistor circuit 7 when the amplifier 37 is in operation. This DC voltage is applied to the transistors 31 and 35 as their base bias voltage and also to the transistor 32 as its collector bias voltage.

A description will be now given on the operation of the apparatus illustrated in FIG. 10. If the detector circuit 41 detects an abnormal signal or pulse E which is caused by, for example, the fact that the voice coil 40 disposed in association with the speaker 39 is shortcircuited so that a pulse having a transient characteristic is applied between the emitter and collector electrodes of the transistor 34. As a result, the transistor 43 becomes conductive and the capacitor 9 in the transistor circuit 7 discharges its stored electric charge instantaneously through the transistor 43 to make the transistor 11, which has been cut off, conductive and to make the transistor 14 non-conductive. Consequently, the output voltage appearing at the output terminal 16 falls abruptly, as described in connection with FIGS. 1 and 2, and prevents the application of voltage to the resistors 47 and 48 for driving the transistors.

Accordingly, the single-ended push pull circuit of the power amplifier stops its amplifying operation from the time when the abnormal signal is produced. The stop time period of the single-ended push-pull circuit continues until the transistor 43 of the detector circuit 41 is made non-conductive, if the abnormal signal has an instantaneous transient characteristic. Thereafter, it returns its amplifying operation in accordance with the rise time characteristic shown in FIG. 2. On the other hand, if the abnormal signal is sequentially produced, the single-end push-pull circuit stops its amplifying operation intermittently.

Accordingly, by the use of the invention, the singleended push-pull circuit is positively prevented from being damaged by an excess current produced when the abnormal signal is generated.

Further, since the bias voltage is applied to the'transistors 31 and 32 through the transistor circuit 7 in the example of FIG. 10, the DC voltage applied to the transistors 31 and 32 is slow in its rise, in accordance with the characteristic shown in FIG. 2, when the power switch is turned on. As a result, when the power source switch is turned on, the transistors 31 and 32 are not supplied with voltage, and are thus inoperative, so that a click noise produced at that time is not reproduced from the speaker after being amplified. When the power source switch is turned off, the DC voltage very rapidly becomes substantially zero, so that the transistors 31 and 32 stop their amplifying operation at that moment to prevent the reproduction of a click noise produced when the power source switch is turned off.

It will be obvious to those having ordinary skill in the art that many changes and modifications may be made in the details of the above described preferred embodiments of the present invention. For example, different types of transistors can be employed. Therefore, the scope of the present invention should only be determined by the following claims.

1 I claim as my invention:

1. In a transistor circuit having a pair Of input terminals adapted to be connected to a DC voltage source and a pair of output terminals adapted to be connected to a utilization device, the combination comprising:

a transistor having emitter, base and collector electrodes,

connecting means connecting said emitter and collector electrodes in series between one of said input terminals and one of said output terminals, the other Of said pair of input terminals being connected directly to the other of said pair of output terminals,

timing circuit means comprising a series circuit including a resistor and a capacitor connected across said input terminals and rectifying means connected between said capacitor and one of said input terminals for establishing a first current path including said capacitor and said resistor and a second current path including said capacitor and said rectifying means, said first current path being operative to charge said capacitor through said resistor at a gradual rate when a DC voltage is first applied to said input terminals and said second current path being operative to discharge said capacitor at an abrupt rate through said rectifying means when said DC voltage is disconnected from said input terminals,

and circuit means connecting said timing circuit to said base electrode, to control the conductivity of said transistor to cause the voltage at said output terminals to gradually rise in response to application of a DC voltage to said input terminals, and to abruptly fall when said DC voltage is removed from said input terminals.

2. The combination claimed in claim 1, wherein said circuit means includes a second transistor having its base connected to said timing circuit and having one of its other terminals connected to the base of the first transistor through a resistor, and including means for connecting the remaining terminal of said second transistor with said other input terminal.

3. The combination claimed in claim 1, including resistance means connected across said input terminals and operative to complete said second current path.

4. In a transistor circuit having an output terminal and a pair of input terminals, said input terminals adapted to be connected with a DC power source, the combination comprising;

a series circuit comprising a diode and a capacitor connected between said input terminals and 5 adapted to be parallely connected to said DC power source,

first transistor having first, second and third electrodes, said first electrode being connected to the junction between the diode and the capacitor of said series circuit, said second electrode being connected to one of said input terminals through a first resistor, and said third electrode being connected to the other of said input terminals, and

second transistor having first, second and third electrodes, said first electrode being connected through a second resistor, to the junction between said first resistor and the second electrode of the first transistor, said second electrode being connected to said output terminal, and said third electrode being connected to one of said input terminals.

5. The combination claimed in claim 4, including an active element having a signal input electrode supplied with a signal and a signal output electrode, said signal input electrode being connected to said second electrode of said second transistor.

6. The combination claimed in claim 4, including an active element having a signal input electrode supplied with a signal and a signal output electrode to which a load is connected, said signal output electrode being connected to said second electrode of said second transistor.

7. The combination claimed in claim 4, wherein a second capacitor is connected between said first electrode of said second transistor and said other'input ter minal.

8. The combination as claimed in claim 4, including a Zener diode connected between said first electrode of said second transistor and said other input terminal.

9. The combination as claimed in claim 4, including a third transistor connected between said first electrode of said first transistor and the junction of the diode and the capacitor of said series circuit.

10. The combination claimed in claim 4, including a third transistor connected between said first electrode of said second transistor and said second resistor.

11. The combination as claimed in claim 4, including a Zener diode connected between said second electrode of said second transistor and said output terminal.

12. The combination as claimed in claim 4, including an active element for amplifying an input signal, means for connecting said second transistor to said active element for applying a bias voltage thereto, and detecting means connected with said active element and with said first transistor for detecting an overload of said active element and responsive to such detection to make said first transistor non-conductive and to lower the bias voltage applied to said active element.

13. The combination as claimed in claim 12, wherein said detecting means includes a third transistor having an input electrode connected to said active element through a capacitor, and circuit means including said third transistor for completing a circuit to earth from the junction between the diode and the capacitor of said series circuit. 

1. In a transistor circuit having a pair Of input terminals adapted to be connected to a DC voltage source and a pair of output terminals adapted to be connected to a utilization device, the combination comprising: a transistor having emitter, base and collector electrodes, connecting means connecting said emitter and collector electrodes in series between one of said input terminals and one of said output terminals, the other Of said pair of input terminals being connected directly to the other of said pair of output terminals, timing circuit means comprising a series circuit including a resistor and a capacitor connected across said input terminals and rectifying means connected between said capacitor and one of said input terminals for establishing a first current path including said capacitor and said resistor and a second current path including said capacitor and said rectifying means, said first current path being operative to charge said capacitor through said resistor at a gradual rate when a DC voltage is first applied to said input terminals and said second current path being operative to discharge said capacitor at an abrupt rate through said rectifying means when said DC voltage is disconnected from said input terminals, and circuit means connecting said timing circuit to said base electrode, to control the conductivity of said transistor to cause the voltage at said outpuT terminals to gradually rise in response to application of a DC voltage to said input terminals, and to abruptly fall when said DC voltage is removed from said input terminals.
 2. The combination claimed in claim 1, wherein said circuit means includes a second transistor having its base connected to said timing circuit and having one of its other terminals connected to the base of the first transistor through a resistor, and including means for connecting the remaining terminal of said second transistor with said other input terminal.
 3. The combination claimed in claim 1, including resistance means connected across said input terminals and operative to complete said second current path.
 4. In a transistor circuit having an output terminal and a pair of input terminals, said input terminals adapted to be connected with a DC power source, the combination comprising; a series circuit comprising a diode and a capacitor connected between said input terminals and adapted to be parallely connected to said DC power source, a first transistor having first, second and third electrodes, said first electrode being connected to the junction between the diode and the capacitor of said series circuit, said second electrode being connected to one of said input terminals through a first resistor, and said third electrode being connected to the other of said input terminals, and a second transistor having first, second and third electrodes, said first electrode being connected through a second resistor, to the junction between said first resistor and the second electrode of the first transistor, said second electrode being connected to said output terminal, and said third electrode being connected to one of said input terminals.
 5. The combination claimed in claim 4, including an active element having a signal input electrode supplied with a signal and a signal output electrode, said signal input electrode being connected to said second electrode of said second transistor.
 6. The combination claimed in claim 4, including an active element having a signal input electrode supplied with a signal and a signal output electrode to which a load is connected, said signal output electrode being connected to said second electrode of said second transistor.
 7. The combination claimed in claim 4, wherein a second capacitor is connected between said first electrode of said second transistor and said other input terminal.
 8. The combination as claimed in claim 4, including a Zener diode connected between said first electrode of said second transistor and said other input terminal.
 9. The combination as claimed in claim 4, including a third transistor connected between said first electrode of said first transistor and the junction of the diode and the capacitor of said series circuit.
 10. The combination claimed in claim 4, including a third transistor connected between said first electrode of said second transistor and said second resistor.
 11. The combination as claimed in claim 4, including a Zener diode connected between said second electrode of said second transistor and said output terminal.
 12. The combination as claimed in claim 4, including an active element for amplifying an input signal, means for connecting said second transistor to said active element for applying a bias voltage thereto, and detecting means connected with said active element and with said first transistor for detecting an overload of said active element and responsive to such detection to make said first transistor non-conductive and to lower the bias voltage applied to said active element.
 13. The combination as claimed in claim 12, wherein said detecting means includes a third transistor having an input electrode connected to said active element through a capacitor, and circuit means including said third transistor for completing a circuit to earth from the junction between the diode and the capacitor of said series circuit. 